18 search results - page 1 / 4 » Crosstalk at the Dynamic Node of Domino CMOS Circuits |
CDES
2006
13 years 6 months ago
2006
- The need for faster circuits in smaller area with lower power dissipation has made it a common practice to use the domino CMOS in high performance integrated circuits. However th...
ITC
2003
IEEE
13 years 10 months ago
2003
IEEE
A technique to derive test vectors that exercise the worstcase delay effects in a domino circuit in the presence of crosstalk is described. A model for characterizing the delay of...
ITC
1998
IEEE
13 years 9 months ago
1998
IEEE
We investigate defects in CMOS domino gates and derive the test conditions for them. Very-Low-Voltage Testing can improve the defect coverage, which we define as the maximum detec...
ISQED
2006
IEEE
13 years 10 months ago
2006
IEEE
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...
ISQED
2006
IEEE
13 years 10 months ago
2006
IEEE
- A low overhead circuit technique is proposed in this paper for simultaneously reducing subthreshold and gate oxide leakage currents in domino logic circuits. PMOS sleep transisto...