18 search results - page 1 / 4 » Delay Evaluation of High Speed Data-Path Circuits Based on T... |
PATMOS
2004
Springer
13 years 10 months ago
2004
Springer
The main result is the development, and delay comparison based on Logical Effort, of a number of high speed circuits for common arithmetic and related operations using threshold l...
ISQED
2006
IEEE
13 years 10 months ago
2006
IEEE
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...
ISVLSI
2005
IEEE
13 years 10 months ago
2005
IEEE
In this paper, we propose Boost Logic, a logic family which relies on voltage scaling, gate overdrive and energy recovery techniques to achieve high energy efficiency at frequenc...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
Abstract--Resonant tunneling diodes (RTDs) have demonstrated promising circuit characteristics of high speed switching property and versatile functionality with negative differenti...
ISCAS
2006
IEEE
13 years 10 months ago
2006
IEEE
—The Delay Filtered Dual Interlocked storage Cell (DF-DICE) offers a scalable solution in different radiation environments for soft error mitigation. The area and speed performan...