15 search results - page 2 / 3 » Delay optimal low-power circuit clustering for FPGAs with du... |
DAC
2004
ACM
14 years 6 months ago
2004
ACM
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper proposes an optimum methodology for assigning supply and threshold voltages to modules in a CMOS circuit such that the overall energy consumption is minimized for a giv...
TCAD
2010
13 years 5 days ago
2010
Abstract--This paper presents a technology mapping algorithm for field-programmable gate array architectures with dual supply voltages (Vdds) for power optimization. This is done w...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
We describe an optimization strategy for minimizing total power consumption using dual threshold voltage (Vth) technology. Significant power savings are possible by simultaneous a...
ASPDAC
2008
ACM
13 years 7 months ago
2008
ACM
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...