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DAC
2001
ACM
14 years 6 months ago
Dynamic Voltage Scaling and Power Management for Portable Systems
Portable systems require long battery lifetime while still delivering high performance. Dynamic voltage scaling (DVS) algorithms reduce energy consumption by changing processor sp...
Tajana Simunic, Luca Benini, Andrea Acquaviva, Pet...
ISQED
2010
IEEE
161views Hardware» more  ISQED 2010»
13 years 7 months ago
Minimizing the power consumption of a Chip Multiprocessor under an average throughput constraint
- In a multi-core system, power and performance may be dynamically traded off by utilizing power management (PM). This paper addresses the problem of minimizing the total power con...
Mohammad Ghasemazar, Ehsan Pakbaznia, Massoud Pedr...
CODES
2008
IEEE
13 years 5 months ago
Methodology for multi-granularity embedded processor power model generation for an ESL design flow
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...
CLUSTER
2005
IEEE
13 years 11 months ago
A Feasibility Analysis of Power Awareness in Commodity-Based High-Performance Clusters
We present a feasibility study of a power-reduction scheme that reduces the thermal power of processors by lowering frequency and voltage in the context of high-performance comput...
Chung-Hsing Hsu, Wu-chun Feng
MICRO
2008
IEEE
106views Hardware» more  MICRO 2008»
13 years 11 months ago
EVAL: Utilizing processors with variation-induced timing errors
Parameter variation in integrated circuits causes sections of a chip to be slower than others. If, to prevent any resulting timing errors, we design processors for worst-case para...
Smruti R. Sarangi, Brian Greskamp, Abhishek Tiwari...