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» Dynamic learning based scan chain diagnosis
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DATE
2007
IEEE
126views Hardware» more  DATE 2007»
13 years 11 months ago
Dynamic learning based scan chain diagnosis
Scan chain defect diagnosis is important to silicon debug and yield enhancement. Traditional simulationbased chain diagnosis algorithms may take long run time if a large number of...
Yu Huang
ATS
2009
IEEE
126views Hardware» more  ATS 2009»
13 years 12 months ago
Scan Chain Diagnosis by Adaptive Signal Profiling with Manufacturing ATPG Patterns
—In the past, software based scan chain defect diagnosis can be roughly classified into two categories (1) model-based algorithms, and (2) data-driven algorithms. In this paper w...
Yu Huang, Wu-Tung Cheng, Ruifeng Guo, Ting-Pu Tai,...
DATE
2002
IEEE
99views Hardware» more  DATE 2002»
13 years 10 months ago
Gate Level Fault Diagnosis in Scan-Based BIST
A gate level, automated fault diagnosis scheme is proposed for scan-based BIST designs. The proposed scheme utilizes both fault capturing scan chain information and failing test v...
Ismet Bayraktaroglu, Alex Orailoglu
VLSID
2005
IEEE
131views VLSI» more  VLSID 2005»
14 years 5 months ago
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
VTS
2003
IEEE
122views Hardware» more  VTS 2003»
13 years 10 months ago
A Reconfigurable Shared Scan-in Architecture
In this paper, an efficient technique for test data volume reduction based on the shared scan-in (Illinois Scan) architecture and the scan chain reconfiguration (Dynamic Scan) arc...
Samitha Samaranayake, Emil Gizdarski, Nodari Sitch...