130 search results - page 2 / 26 » Dynamically Scheduling VLIW Instructions |
ICCD
2003
IEEE
14 years 2 months ago
2003
IEEE
The VLIW processors with static instruction scheduling and thus deterministic execution times are very suitable for highperformance real-time DSP applications. But the two major w...
TSP
2008
13 years 5 months ago
2008
The focus of this paper is on VLIW instruction scheduling that minimizes the variation of power consumed by the processor during the execution of a target program. We use rough set...
DAC
2002
ACM
14 years 6 months ago
2002
ACM
Aim of this paper is to propose a methodology for the definition of an instruction-level energy estimation framework for VLIW (Very Long Instruction Word) processors. The power mo...
APCSAC
2005
IEEE
13 years 11 months ago
2005
IEEE
Abstract. Power-balanced instruction scheduling for Very Long Instruction Word (VLIW) processors is an optimization problem which requires a good instruction-level power model for ...
ISLPED
2003
ACM
13 years 11 months ago
2003
ACM
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...