70 search results - page 1 / 14 » Enhanced leakage reduction Technique by gate replacement |
DAC
2005
ACM
14 years 6 months ago
2005
ACM
Input vector control (IVC) technique utilizes the stack effect in CMOS circuit to apply the minimum leakage vector (MLV) to the circuit at the sleep mode to reduce leakage. Additi...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
—1As technology scales, the aging effect caused by Negative Bias Temperature Instability (NBTI) has become a major reliability concern for circuit designers. On the other hand, r...
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
Leakage power dissipation is one of the most critical factors for the overall current dissipation and future designs. However, design techniques for the reduction of leakage power...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
ISQED
2006
IEEE
13 years 11 months ago
2006
IEEE
As a result of aggressive technology scaling, gate leakage (gate oxide direct tunneling) has become a major component of total power dissipation. Use of dielectrics of higher perm...