Sciweavers

56 search results - page 3 / 12
» Evaluation and Design of Processor-Like Reconfigurable Archi...
Sort
View
ERSA
2008
130views Hardware» more  ERSA 2008»
13 years 6 months ago
Evaluation of MuCCRA-D: A Dynamically Reconfigurable Processor with Directly Interconnected PEs
Coarse-grained dynamically reconfigurable processor arrays (DRPAs) have been received an attention as a flexible and efficient off-loading engine for various types of System-on-Ch...
Masaru Kato, Yohei Hasegawa, Hideharu Amano
FPGA
2004
ACM
120views FPGA» more  FPGA 2004»
13 years 10 months ago
Flexibility measurement of domain-specific reconfigurable hardware
Traditional metrics used to compare hardware designs include area, performance, and power. However, these metrics do not form a complete evaluation of reconfigurable hardware. For...
Katherine Compton, Scott Hauck
IPPS
1998
IEEE
13 years 9 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf
FPGA
2006
ACM
141views FPGA» more  FPGA 2006»
13 years 9 months ago
A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
This report describes a preliminary evaluation of possible performance of an FPGA-like architecture for future hybrid "CMOL" circuits which combine a semiconductor-trans...
Dmitri B. Strukov, Konstantin Likharev
ISCAS
2003
IEEE
123views Hardware» more  ISCAS 2003»
13 years 10 months ago
Fast prototyping of reconfigurable architectures from a C program
Rapid evaluation and design space exploration at the algorithmic level are important issues in the design cycle. In this paper we propose an original area vs delay estimation meth...
Sebastien Bilavarn, Guy Gogniat, Jean Luc Philippe...