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ISCAS
2006
IEEE
102views Hardware» more  ISCAS 2006»
14 years 2 days ago
A fast dual-field modular arithmetic logic unit and its hardware implementation
— We propose a fast Modular Arithmetic Logic Unit (MALU) that is scalable in the digit size (d) and the field size (k). The datapath of MALU has chains of Carry Save Adders (CSA...
Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede
CIMAGING
2009
94views Hardware» more  CIMAGING 2009»
13 years 3 months ago
Iterative demosaicking accelerated: theory and fast noniterative implementations
Color image demosaicking is a key process in the digital imaging pipeline. In this paper, we present a rigorous treatment of a classical demosaicking algorithm based on alternatin...
Yue M. Lu, Mina Karzand, Martin Vetterli
ESANN
2006
13 years 7 months ago
Parallel hardware implementation of a broad class of spiking neurons using serial arithmetic
Abstract. Current digital, directly mapped implementations of spiking neural networks use serial processing and parallel arithmetic. On a standard CPU, this might be the good choic...
Benjamin Schrauwen, Jan M. Van Campenhout
ASPDAC
2006
ACM
115views Hardware» more  ASPDAC 2006»
14 years 20 hour ago
Hardware implementation of super minimum all digital FM demodulator
– We propose improvement of the new architecture of digital FM demodulator. This work enhances signal quality, system clock frequency, and superior than well known PLL technique ...
Nursani Rahmatullah, Arif E. Nugroho