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MEMICS
2010
12 years 11 months ago
Fast Translated Simulation of ASIPs
Application-specific instruction set processors are the core of nowadays embedded systems. Therefore, the designers need to have powerful tools for the processor design. The tools...
Zdenek Prikryl, Jakub Kroustek, Tomas Hruska, Dusa...
TVLSI
2008
187views more  TVLSI 2008»
13 years 4 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
FDL
2003
IEEE
13 years 9 months ago
Object-Oriented ASIP Design and Synthesis
SystemC-Plus from the ODETTE project provides the ability to simulate and synthesise object-oriented specifications into hardware. The current ODETTE compiler translates each obj...
Maziar Goudarzi, Shaahin Hessabi, Alan Mycroft
CODES
2009
IEEE
13 years 11 months ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
DATE
2004
IEEE
119views Hardware» more  DATE 2004»
13 years 8 months ago
MINCE: Matching INstructions Using Combinational Equivalence for Extensible Processor
Designing custom-extensible instructions for Extensible Processors1 is a computationally complex task because of the large design space. The task of automatically matching candida...
Newton Cheung, Sri Parameswaran, Jörg Henkel,...