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DAC
2005
ACM
14 years 5 months ago
Fault and energy-aware communication mapping with guaranteed latency for applications implemented on NoC
As feature sizes shrink, transient failures of on-chip network links become a critical problem. At the same time, many applications require guarantees on both message arrival prob...
Sorin Manolache, Petru Eles, Zebo Peng
SBCCI
2005
ACM
276views VLSI» more  SBCCI 2005»
13 years 10 months ago
Virtual channels in networks on chip: implementation and evaluation on hermes NoC
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...
Aline Mello, Leonel Tedesco, Ney Calazans, Fernand...
PPL
2008
185views more  PPL 2008»
13 years 4 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
ISCAS
2005
IEEE
173views Hardware» more  ISCAS 2005»
13 years 10 months ago
Slack-time aware routing in NoC systems
—Efficient routing schemes are essential if Network on Chip (NoC) architectures are to be used for implementing multi-core systems for real-time multi-media applications. These s...
Daniel Andreasson, Shashi Kumar
CODES
2009
IEEE
13 years 9 months ago
A tuneable software cache coherence protocol for heterogeneous MPSoCs
In a multiprocessor system-on-chip (MPSoC) private caches introduce the cache coherence problem. Here, we target at heterogeneous MPSoCs with a network-on-chip (NoC). Existing har...
Frank E. B. Ophelders, Marco Bekooij, Henk Corpora...