A novel serial-in parallel-out finite field multiplier using redundant representation is proposed. It is shown that the proposed architecture has either a significantly lower compl...
This article presents simple and highly regular architectures for finite field multipliers using a redundant representation. The basic idea is to embed a finite field into a cyclo...
Huapeng Wu, M. Anwarul Hasan, Ian F. Blake, Shuhon...
— Reordered normal basis is a certain permutation of a type II optimal normal basis. In this paper, a high speed design of a word level finite field multiplier using reordered ...
—The Massey-Omura multiplier is a well-known sequential multiplier over finite fields GF(2m ), which can perform multiplication in m clock cycles for the normal basis. In this ar...
In hardware implementation for the finite field, the use of normal basis has several advantages, especially the optimal normal basis is the most efficient to hardware implementati...
Chang Han Kim, Yongtae Kim, Sung Yeon Ji, IlWhan P...