Sciweavers

44 search results - page 1 / 9
» Finite Field Multiplier Using Redundant Representation
Sort
View
TC
2008
13 years 4 months ago
A New Finite-Field Multiplier Using Redundant Representation
A novel serial-in parallel-out finite field multiplier using redundant representation is proposed. It is shown that the proposed architecture has either a significantly lower compl...
Ashkan Hosseinzadeh Namin, Huapeng Wu, Majid Ahmad...
TC
2002
13 years 4 months ago
Finite Field Multiplier Using Redundant Representation
This article presents simple and highly regular architectures for finite field multipliers using a redundant representation. The basic idea is to embed a finite field into a cyclo...
Huapeng Wu, M. Anwarul Hasan, Ian F. Blake, Shuhon...
ISCAS
2008
IEEE
287views Hardware» more  ISCAS 2008»
13 years 11 months ago
A high speed word level finite field multiplier using reordered normal basis
— Reordered normal basis is a certain permutation of a type II optimal normal basis. In this paper, a high speed design of a word level finite field multiplier using reordered ...
Ashkan Hosseinzadeh Namin, Huapeng Wu, Majid Ahmad...
APCCAS
2006
IEEE
292views Hardware» more  APCCAS 2006»
13 years 11 months ago
Another Look at the Sequential Multiplier over Normal Bases
—The Massey-Omura multiplier is a well-known sequential multiplier over finite fields GF(2m ), which can perform multiplication in m clock cycles for the normal basis. In this ar...
Zih-Heng Chen, Ming-Haw Jing, Trieu-Kien Truong, Y...
CIS
2006
Springer
13 years 8 months ago
A New Parallel Multiplier for Type II Optimal Normal Basis
In hardware implementation for the finite field, the use of normal basis has several advantages, especially the optimal normal basis is the most efficient to hardware implementati...
Chang Han Kim, Yongtae Kim, Sung Yeon Ji, IlWhan P...