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» Heterogeneous Programmable Logic Block Architectures
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ASPDAC
2009
ACM
137views Hardware» more  ASPDAC 2009»
13 years 9 months ago
Reconfigurable double gate carbon nanotube field effect transistor based nanoelectronic architecture
-- Carbon nanotubes (CNTs) and carbon nanotube field effect transistors (CNFETs) have demonstrated extraordinary properties and are widely accepted as the building blocks of next g...
Bao Liu
CIIA
2009
13 years 6 months ago
Physical Synthesis for CPLD Architectures
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...
Sid-Ahmed Senouci
TVLSI
2008
111views more  TVLSI 2008»
13 years 5 months ago
GlitchLess: Dynamic Power Minimization in FPGAs Through Edge Alignment and Glitch Filtering
This paper describes Glitchless, a circuit-level technique for reducing power in FPGAs by eliminating unnecessary logic transitions called glitches. This is done by adding program...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
SOCO
2007
Springer
13 years 12 months ago
Synthesizing Communication Middleware from Explicit Connectors in Component Based Distributed Architectures
In component based software engineering, an application is build by composing trusted and reusable units of execution, the components. A composition is formed by connecting the com...
Dietmar Schreiner, Karl M. Göschka
FPL
2006
Springer
113views Hardware» more  FPL 2006»
13 years 9 months ago
A Novel Heuristic and Provable Bounds for Reconfigurable Architecture Design
This paper is concerned with the application of formal optimisation methods to the design of mixed-granularity FPGAs. In particular, we investigate the appropriate mix and floorpl...
Alastair M. Smith, George A. Constantinides, Peter...