110 search results - page 2 / 22 » Improving Transition Delay Test Using a Hybrid Method |
VTS
2007
IEEE
14 years 1 days ago
2007
IEEE
The sensitivity of very deep submicron designs to supply voltage noise is increasing due to higher path delay variations and reduced noise margins with supply noise scaling. The s...
ENTCS
2007
13 years 5 months ago
2007
We introduce a hybrid variant of a dynamic logic with continuous state transitions along differential equations, and we present a sequent calculus for this extended hybrid dynami...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
VTS
2008
IEEE
14 years 5 days ago
2008
IEEE
— Higher chip densities and the push for higher performance have continued to drive design needs. Transition delay fault testing has become the preferred method for ensuring thes...
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...