41 search results - page 1 / 9 » Industrial experience with test generation languages for pro... |
DAC
2004
ACM
13 years 10 months ago
2004
ACM
MTV
2006
IEEE
13 years 10 months ago
2006
IEEE
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
DATE
2000
IEEE
13 years 9 months ago
2000
IEEE
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
DAC
2005
ACM
13 years 6 months ago
2005
ACM
Parallelism in processor architecture and design imposes a verification challenge as the exponential growth in the number of execution combinations becomes unwieldy. In this paper...
CODES
2008
IEEE
13 years 6 months ago
2008
IEEE
Functional validation is a major bottleneck in microprocessor design methodology. Simulation is the widely used method for functional validation using billions of random and biase...