154 search results - page 2 / 31 » Interconnect Optimization Strategies for High-Performance VL... |
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
GLVLSI
2000
IEEE
13 years 9 months ago
2000
IEEE
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
ISVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
System-level design techniques promise a way to lessen the productivity gap between fabrication and design. Unfortunately, these techniques have been slow to catch on, in part bec...
ARVLSI
1999
IEEE
13 years 9 months ago
1999
IEEE
We describe a method to clock the domino pipeline at the maximum rate by using soft synchronizers between pipeline stages and thus allowing "time borrowing," i.e., allow...
FCCM
1998
IEEE
13 years 9 months ago
1998
IEEE
PAM-Blox are object-oriented circuit generators on top of the PCI Pamette design environment, PamDC. High- performance FPGA design for adaptive computing is simplified by using a ...