21 search results - page 4 / 5 » Interconnect scaling implications for CAD |
FPGA
2009
ACM
14 years 17 days ago
2009
ACM
Aggressive scaling increases the number of devices we can integrate per square millimeter but makes it increasingly difficult to guarantee that each device fabricated has the inte...
ICCAD
2007
IEEE
14 years 2 months ago
2007
IEEE
Abstract— Typical nonlinear model order reduction approaches need to address two issues: reducing the order of the model, and approximating the vector field. In this paper we fo...
ISPD
2005
ACM
13 years 11 months ago
2005
ACM
The sustained progress of VLSI technology has altered the landscape of routing which is a major physical design stage. For timing driven routings, traditional approaches which con...
MICRO
2008
IEEE
14 years 5 days ago
2008
IEEE
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
ISPASS
2007
IEEE
14 years 1 days ago
2007
IEEE
Parameter variation due to manufacturing error will be an unavoidable consequence of technology scaling in future generations. The impact of random variation in physical factors s...