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» Latency Minimization for Synchronous Data Flow Graphs
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DSD
2007
IEEE
120views Hardware» more  DSD 2007»
13 years 11 months ago
Latency Minimization for Synchronous Data Flow Graphs
Synchronous Data Flow Graphs (SDFGs) are a very useful means for modeling and analyzing streaming applications. Some performance indicators, such as throughput, have been studied b...
Amir Hossein Ghamarian, Sander Stuijk, Twan Basten...
ASPDAC
2011
ACM
227views Hardware» more  ASPDAC 2011»
12 years 8 months ago
Minimizing buffer requirements for throughput constrained parallel execution of synchronous dataflow graph
– This paper concerns throughput-constrained parallel execution of synchronous data flow graphs. This paper assumes static mapping and dynamic scheduling of nodes, which has seve...
Tae-ho Shin, Hyunok Oh, Soonhoi Ha
DATE
2009
IEEE
120views Hardware» more  DATE 2009»
13 years 12 months ago
Optimizing data flow graphs to minimize hardware implementation
Abstract - This paper describes an efficient graphbased method to optimize data-flow expressions for best hardware implementation. The method is based on factorization, common su...
Daniel Gomez-Prado, Q. Ren, Maciej J. Ciesielski, ...
DAC
1994
ACM
13 years 9 months ago
Data Flow Partitioning for Clock Period and Latency Minimization
Lung-Tien Liu, Minshine Shih, Chung-Kuan Cheng
GLVLSI
2000
IEEE
104views VLSI» more  GLVLSI 2000»
13 years 9 months ago
A new technique for estimating lower bounds on latency for high level synthesis
In this paper we present a novel and fast estimation technique that produces tight latency lower bounds for Data Flow Graphs representing time critical segments of the application...
Helvio P. Peixoto, Margarida F. Jacome