17 search results - page 1 / 4 » Low-power clock trees for CPUs |
ICCAD
1995
IEEE
13 years 8 months ago
1995
IEEE
In this paper we investigate activity-driven clock trees to reduce the dynamic power consumption of synchronous digital CMOS circuits. Sections of an activity-driven clock tree ca...
ITC
2003
IEEE
13 years 10 months ago
2003
IEEE
In a scan-based system with a large number of flip-flops, a major component of power is consumed during scanshift and clocking operation in test mode. In this paper, a novel scan-...
ISVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
As power consumption of the clock tree dominates over 40% of the total power in modern high performance VLSI designs, measures must be taken to keep it under control. One of the m...
TVLSI
2008
13 years 4 months ago
2008
Recently we proposed a new clocking scheme, injection-locked clocking (ILC), to combat deteriorating clock skew and jitter, and hence reduce power consumption in highperformance mi...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
Traditionally, clock network layout is performed after cell placement. Such methodology is facing a serious problem in nanometer IC designs where people tend to use huge clock buff...