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» Modeling of PMOS NBTI Effect Considering Temperature Variati...
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DATE
2009
IEEE
122views Hardware» more  DATE 2009»
14 years 1 days ago
Analysis and optimization of NBTI induced clock skew in gated clock trees
NBTI (Negative Bias Temperature Instability) has emerged as the dominant PMOS device failure mechanism for sub100nm VLSI designs. There is little research to quantify its impact o...
Ashutosh Chakraborty, Gokul Ganesan, Anand Rajaram...
DATE
2009
IEEE
145views Hardware» more  DATE 2009»
14 years 1 days ago
Joint logic restructuring and pin reordering against NBTI-induced performance degradation
Negative Bias Temperature Instability (NBTI), a PMOS aging phenomenon causing significant loss on circuit performance and lifetime, has become a critical challenge for temporal re...
Kai-Chiang Wu, Diana Marculescu
ISQED
2010
IEEE
177views Hardware» more  ISQED 2010»
14 years 4 days ago
Multi-corner, energy-delay optimized, NBTI-aware flip-flop design
With the CMOS transistors being scaled to sub 45nm and lower, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging pr...
Hamed Abrishami, Safar Hatami, Massoud Pedram
ISQED
2006
IEEE
259views Hardware» more  ISQED 2006»
13 years 11 months ago
Impact of NBTI on SRAM Read Stability and Design for Reliability
— Negative Bias Temperature Instability (NBTI) has the potential to become one of the main show-stoppers of circuit reliability in nanometer scale devices due to its deleterious ...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...
DATE
2010
IEEE
180views Hardware» more  DATE 2010»
13 years 10 months ago
Reliability- and process variation-aware placement for FPGAs
Abstract—Negative bias temperature instability (NBTI) significantly affects nanoscale integrated circuit performance and reliability. The degradation in threshold voltage (Vth) d...
Assem A. M. Bsoul, Naraig Manjikian, Li Shang