38 search results - page 2 / 8 » NoC Design and Implementation in 65nm Technology |
ICCAD
2007
IEEE
14 years 2 months ago
2007
IEEE
— Starting at the 65nm node, stress engineering to improve performance of transistors has been a major industry focus. An intrinsic stress source – shallow trench isolation –...
TVLSI
2010
12 years 12 months ago
2010
:- This paper describes the design and VLSI architecture for a 4x4 breadth first K-Best MIMO decoder using a 64 QAM scheme. A novel sort free approach to path extension, as well as...
ITCC
2005
IEEE
13 years 10 months ago
2005
IEEE
The interconnection network plays an important role in the performance and energy consumption of a Networkon-Chip (NoC) system. In this paper, we propose a RDT(2,2,1)/α-based int...
ASPDAC
2008
ACM
13 years 7 months ago
2008
ACM
Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
In this paper we describe how Network-on-Chip (NoC) will be the next major challenge to implementing complex and function-rich applications in advanced manufacturing processes at ...