43 search results - page 4 / 9 » On Applying Incremental Satisfiability to Delay Fault Testin... |
ET
2002
13 years 4 months ago
2002
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
MEMOCODE
2007
IEEE
13 years 10 months ago
2007
IEEE
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
ISESE
2006
IEEE
13 years 10 months ago
2006
IEEE
Effective testing of safety-critical real-time embedded software is difficult and expensive. Many companies are hesitant about the cost of formalized criteria-based testing and a...
ATS
2003
IEEE
13 years 10 months ago
2003
IEEE
A new technique for synthesizing totally symmetric Boolean functions is presented that achieves complete robust path delay fault testability. We apply BDDs for the synthesis of sy...
DATE
2010
IEEE
13 years 9 months ago
2010
IEEE
When testing delay faults on critical paths, conventional structural test patterns may be applied in functionally-unreachable states, leading to over-testing or under-testing of t...