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» Parameterized and low power DSP core for embedded systems
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FPL
2008
Springer
91views Hardware» more  FPL 2008»
13 years 6 months ago
Power efficient DSP datapath configuration methodology for FPGA
Exploiting the underutilisation of variable-length DSP algorithms during normal operation is vital, when seeking to maximise the achievable functionality of an application within ...
Stephen McKeown, Roger Woods, John McAllister
IPPS
1998
IEEE
13 years 9 months ago
Code Transformations for Low Power Caching in Embedded Multimedia Processors
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...
Chidamber Kulkarni, Francky Catthoor, Hugo De Man
CSREAESA
2006
13 years 6 months ago
Fast Run-Time Power Monitoring Methodology for Embedded Systems
Traditional simulation-based energy estimation is not practical because the simulation time has increased from minutes and hours and weeks. Therefore, simulation assisted by speci...
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
VLSID
2005
IEEE
129views VLSI» more  VLSID 2005»
14 years 5 months ago
A RISC Hardware Platform for Low Power Java
Java is increasingly being used as a language and binary format for low power, embedded systems. Current software only approaches to Java execution do not always suit the type of ...
Paul Capewell, Ian Watson
ASPDAC
2001
ACM
83views Hardware» more  ASPDAC 2001»
13 years 8 months ago
Trace-driven system-level power evaluation of system-on-a-chip peripheral cores
Our earlier work for fast evaluation of power consumption of general cores in a system-on-a-chip described techniques that involved isolating high-level instructions of a core, me...
Tony Givargis, Frank Vahid, Jörg Henkel