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» Parametric, Secure and Compact Implementation of RSA on FPGA
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ISCAS
2008
IEEE
127views Hardware» more  ISCAS 2008»
13 years 11 months ago
Compact ASIC implementation of the ICEBERG block cipher with concurrent error detection
— ICEBERG is a block cipher that has been recently proposed for security applications requiring efficient FPGA implementations. In this paper, we investigate a compact ASIC imple...
Huiju Cheng, Howard M. Heys
GLVLSI
2009
IEEE
170views VLSI» more  GLVLSI 2009»
13 years 8 months ago
Physical unclonable function and true random number generator: a compact and scalable implementation
Physical Unclonable Functions (PUF) and True Random Number Generators (TRNG) are two very useful components in secure system design. PUFs can be used to extract chip-unique signat...
Abhranil Maiti, Raghunandan Nagesh, Anand Reddy, P...
ASAP
2008
IEEE
182views Hardware» more  ASAP 2008»
13 years 11 months ago
Low-cost implementations of NTRU for pervasive security
NTRU is a public-key cryptosystem based on the shortest vector problem in a lattice which is an alternative to RSA and ECC. This work presents a compact and low power NTRU design ...
Ali Can Atici, Lejla Batina, Junfeng Fan, Ingrid V...
GLVLSI
2007
IEEE
166views VLSI» more  GLVLSI 2007»
13 years 8 months ago
Efficient pipelining for modular multiplication architectures in prime fields
This paper presents a pipelined architecture of a modular Montgomery multiplier, which is suitable to be used in public key coprocessors. Starting from a baseline implementation o...
Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid...
PAIRING
2010
Springer
153views Cryptology» more  PAIRING 2010»
13 years 3 months ago
Compact Hardware for Computing the Tate Pairing over 128-Bit-Security Supersingular Curves
This paper presents a novel method for designing compact yet efficient hardware implementations of the Tate pairing over supersingular curves in small characteristic. Since such cu...
Nicolas Estibals