193 search results - page 3 / 39 » Patching Processor Design Errors |
DFT
2008
IEEE
13 years 7 months ago
2008
IEEE
This paper presents a concurrent error detection technique for the control logic of a modern microprocessor. Our method is based on execution time prediction for each instruction ...
DAC
2012
ACM
11 years 8 months ago
2012
ACM
Much recent research [8, 6, 7] suggests significant power and energy benefits of relaxing correctness constraints in future processors. Such processors with relaxed constraints ...
PG
2007
IEEE
14 years 18 hour ago
2007
IEEE
Developable surfaces have many desired properties in manufacturing process. Since most existing CAD systems utilize parametric surfaces as the design primitive, there is a great d...
MICRO
2010
IEEE
13 years 3 months ago
2010
IEEE
Soft error reliability is increasingly becoming a first-order design concern for microprocessors, as a result of higher transistor counts, shrinking device geometries and lowering ...
CASES
2011
ACM
12 years 5 months ago
2011
ACM
Escalating variations in modern CMOS designs have become a threat to Moore’s law. While previous works have proposed techniques for tolerating variations by trading reliability ...