57 search results - page 3 / 12 » Peak Power Minimization Through Datapath Scheduling |
VLSID
2007
IEEE
14 years 6 months ago
2007
IEEE
We present minimization methodologies and an algorithm for simultaneous scheduling, binding, and allocation for the reduction of total power and power fluctuation during behaviora...
VTS
2002
IEEE
13 years 10 months ago
2002
IEEE
Parallel test application helps reduce the otherwise considerable test times in SOCs; yet its applicability is limited by average and peak power considerations. The typical test v...
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
In this paper we present two polynomial time-complexity heuristic algorithms for optimization of gate-oxide leakage (tunneling current) during behavioral synthesis through simulta...
MICRO
2005
IEEE
13 years 11 months ago
2005
IEEE
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
CF
2010
ACM
13 years 9 months ago
2010
ACM
Studies have shown much of today’s data centers are over-provisioned and underutilized. Over-provisioning cannot be avoided as these centers must anticipate peak load with burst...