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VLSID
2005
IEEE
285views VLSI» more  VLSID 2005»
12 years 10 months ago
Power Monitors: A Framework for System-Level Power Estimation Using Heterogeneous Power Models
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
Nikhil Bansal, Kanishka Lahiri, Anand Raghunathan,...
ICCD
2005
IEEE
176views Hardware» more  ICCD 2005»
12 years 6 months ago
A Formal Framework for Modeling and Analysis of System-Level Dynamic Power Management
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
Shrirang M. Yardi, Karthik Channakeshava, Michael ...
DAC
1997
ACM
12 years 1 months ago
A Power Estimation Framework for Designing Low Power Portable Video Applications
This paper presents a power evaluation framework designed for estimating power consumption of a new video telephone compression standard, ITU-H.263, at the system level. A hierarc...
Chi-Ying Tsui, Kai-Keung Chan, Qing Wu, Chih-Shun ...
TVLSI
2010
11 years 4 months ago
Variation-Aware System-Level Power Analysis
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
ISLPED
2005
ACM
147views Hardware» more  ISLPED 2005»
12 years 3 months ago
System level power and performance modeling of GALS point-to-point communication interfaces
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...
Koushik Niyogi, Diana Marculescu
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