7 search results - page 1 / 2 » Random benchmark circuits with controlled attributes |
DATE
1997
IEEE
13 years 9 months ago
1997
IEEE
Two major improvements, controlled fan-in and automated initial-circuit production, were made over the random generator of benchmark circuits presented at DAC'94. This is an ...
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
A novel approach to testing sequential circuits that uses multi-level decision diagram representations is introduced. The proposed algorithm consists of a combination of scanning ...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
Title of thesis: EFFICIENT AND ACCURATE STATISTICAL TIMING ANALYSIS FOR NON-LINEAR NON-GAUSSIAN VARIABILITY WITH INCREMENTAL ATTRIBUTES Ashish Dobhal, Master of Science, 2006 Thes...
ICCD
2001
IEEE
14 years 1 months ago
2001
IEEE
We present a simulation-based semi-formal verification method for sequential circuits described at the registertransfer level. The method consists of an iterative loop where cove...
ITC
1997
IEEE
13 years 9 months ago
1997
IEEE
A deterministic BIST scheme is presented which requires less hardware overhead than pseudo-random BIST but obtains better or even complete fault coverage at the same time. It take...