59 search results - page 3 / 12 » Runtime leakage power estimation technique for combinational... |
DAC
2004
ACM
13 years 9 months ago
2004
ACM
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...
ICCD
2004
IEEE
2004
IEEE
Circuit-Based Preprocessing of ILP and Its Applications in Leakage Minimization and Power Estimation
14 years 2 months ago
In this paper we discuss the application of circuit-based logical reasoning to simplify optimization problems expressed as integer linear programs (ILP) over circuit states. We de...
DATE
2009
IEEE
14 years 16 days ago
2009
IEEE
— Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way th...
DATE
2009
IEEE
14 years 16 days ago
2009
IEEE
—1As technology scales, the aging effect caused by Negative Bias Temperature Instability (NBTI) has become a major reliability concern for circuit designers. On the other hand, r...
CODES
2008
IEEE
14 years 7 days ago
2008
IEEE
Adaptive Body Biasing (ABB) is a popularly used technique to mitigate the increasing impact of manufacturing process variations on leakage power dissipation. The efficacy of the ...