15 search results - page 2 / 3 » Side-Channel Leakage Tolerant Architectures |
IMA
2007
Springer
13 years 10 months ago
2007
Springer
Abstract. Software based side-channel attacks allow an unprivileged spy process to extract secret information from a victim (cryptosystem) process by exploiting some indirect leaka...
MICRO
2007
IEEE
13 years 11 months ago
2007
IEEE
Process variations will greatly impact the stability, leakage power consumption, and performance of future microprocessors. These variations are especially detrimental to 6T SRAM ...
TVLSI
2010
12 years 11 months ago
2010
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
ISQED
2008
IEEE
13 years 11 months ago
2008
IEEE
We present an error-tolerant SRAM design optimized for ultra-low standby power. Using SRAM cell optimization techniques, the maximum data retention voltage (DRV) of a 90nm 26kb SR...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
: Asynchronous circuits are often presented as a means of achieving low power operation. We investigate their suitability for low-energy applications, where long battery life and d...