236 search results - page 2 / 48 » Simulation and Optimization of the Power Distribution Networ... |
EURODAC
1994
IEEE
13 years 10 months ago
1994
IEEE
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
ISCAS
2003
IEEE
13 years 11 months ago
2003
IEEE
In this paper, the Simulated Evolution algorithm (SimE) is engineered to solve the optimization problem of multi-objective VLSI netlist bi-partitioning. The multi-objective versio...
GLVLSI
2005
IEEE
13 years 11 months ago
2005
IEEE
We present simulations for ultra-thin body, fully-depleted, double-gate (DG) silicon-on-insulator (SOI) devices that can be readily optimized for both static power loss and perfor...
VLSID
2005
IEEE
14 years 6 months ago
2005
IEEE
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
ASPDAC
2007
ACM
13 years 10 months ago
2007
ACM
Power grid networks in VLSI circuits are required to provide adequate input supply to ensure reliable performance. In this paper, we propose algorithms to find the placement of pow...