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VLSID
2005
IEEE
285views VLSI» more  VLSID 2005»
14 years 6 months ago
Power Monitors: A Framework for System-Level Power Estimation Using Heterogeneous Power Models
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
Nikhil Bansal, Kanishka Lahiri, Anand Raghunathan,...
DAC
1996
ACM
13 years 10 months ago
A New Hybrid Methodology for Power Estimation
1 In this paper, we propose a hybrid approach for estimating the switching activities of the internal nodes in logic circuits. The new approach combines the advantages of the simul...
David Ihsin Cheng, Kwang-Ting Cheng, Deborah C. Wa...
VLSI
2012
Springer
12 years 1 months ago
A Signature-Based Power Model for MPSoC on FPGA
e technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, for example, commonly used instruction-set sim...
Roberta Piscitelli, Andy D. Pimentel
ISCA
2011
IEEE
287views Hardware» more  ISCA 2011»
12 years 9 months ago
Scalable power control for many-core architectures running multi-threaded applications
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
Kai Ma, Xue Li, Ming Chen, Xiaorui Wang
DAC
1995
ACM
13 years 9 months ago
Power Estimation in Sequential Circuits
Abstract A new method for power estimation in sequential circuits is presented that is based on a statistical estimation technique. By applying randomly generated input sequences t...
Farid N. Najm, Shashank Goel, Ibrahim N. Hajj