26 search results - page 2 / 6 » Testing Configurable LUT-Based FPGAs |
DFT
2009
IEEE
14 years 1 days ago
2009
IEEE
This paper presents the first implementation of Built-In Self-Test (BIST) of Field Programmable Gate Arrays (FPGAs) using a soft core embedded processor for reconfiguration of the...
CSREAESA
2009
13 years 6 months ago
2009
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...
ERSA
2010
13 years 3 months ago
2010
SRAM-based FPGA devices are an attractive option for data processing on space-based platforms, due to high computational capabilities and a lower power envelope than traditional pr...
ITC
2003
IEEE
13 years 10 months ago
2003
IEEE
Abstract: We discuss the development of Built-In SelfTest (BIST) configurations that test all of the programmable logic and interconnect resources in the core of Xilinx 4000E, 4000...
ITC
2002
IEEE
13 years 10 months ago
2002
IEEE
Conventional fault simulation techniques for FPGAs are very complicated and time consuming. The other alternative, FPGA fault emulation technique, is incomplete, and can be used o...