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» Thermal-Aware 3D IC Placement Via Transformation
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ISPD
2005
ACM
151views Hardware» more  ISPD 2005»
13 years 11 months ago
Thermal via placement in 3D ICs
As thermal problems become more evident, new physical design paradigms and tools are needed to alleviate them. Incorporating thermal vias into integrated circuits (ICs) is a promi...
Brent Goplen, Sachin S. Sapatnekar
ICCD
2007
IEEE
139views Hardware» more  ICCD 2007»
14 years 2 months ago
Whitespace redistribution for thermal via insertion in 3D stacked ICs
One of the biggest challenges in 3D stacked IC design is heat dissipation. Incorporating thermal vias is a promising method for reducing the temperatures of 3D ICs. The bonding st...
Eric Wong, Sung Kyu Lim
SLIP
2009
ACM
14 years 7 days ago
Integrated interlayer via planning and pin assignment for 3D ICs
As technology advances, 3D ICs are introduced for alleviating the interconnect problem coming with shrinking feature size and increasing integration density. In 3D ICs, one of the...
Xu He, Sheqin Dong, Xianlong Hong, Satoshi Goto
ISLPED
2006
ACM
99views Hardware» more  ISLPED 2006»
13 years 11 months ago
Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power
All existing methods for thermal-via allocation are based on a steady-state thermal analysis and may lead to excessive number of thermal vias. This paper develops an accurate and ...
Hao Yu, Yiyu Shi, Lei He, Tanay Karnik
ISPD
2011
ACM
253views Hardware» more  ISPD 2011»
12 years 8 months ago
Assembling 2D blocks into 3D chips
Three-dimensional ICs promise to significantly extend the scale of system integration and facilitate new-generation electronics. However, progress in commercial 3D ICs has been s...
Johann Knechtel, Igor L. Markov, Jens Lienig