138 search results - page 1 / 28 » Very Compact FPGA Implementation of the AES Algorithm |
CHES
2003
Springer
13 years 9 months ago
2003
Springer
Abstract. In this paper a compact FPGA architecture for the AES algorithm with 128-bit key targeted for low-cost embedded applications is presented. Encryption, decryption and key ...
CHES
2005
Springer
13 years 9 months ago
2005
Springer
A key step in the Advanced Encryption Standard (AES) algorithm is the “S-box.” Many implementations of AES have been proposed, for various goals, that effect the S-box in vari...
CCS
2007
ACM
13 years 10 months ago
2007
ACM
QUAD is a stream cipher whose provable security relies on the hardness of solving systems of multivariate quadratic equations. This paper explores FPGA implementations of the stre...
ACNS
2008
Springer
13 years 10 months ago
2008
Springer
Implementations of the Advanced Encryption Standard (AES), including hardware applications with limited resources (e.g., smart cards), may be vulnerable to “side-channel attacks...
FPL
2004
Springer
13 years 8 months ago
2004
Springer
Abstract. Field-Programmable Gate Arrays (FPGAs) have lately become a popular target for implementing cryptographic block ciphers, as a well-designed FPGA solution can combine some...