21 search results - page 1 / 5 » WireMap: FPGA technology mapping for improved routability |
FPGA
2008
ACM
13 years 6 months ago
2008
ACM
This paper presents a new technology mapper, WireMap. The mapper uses an edge flow heuristic to improve the routability of a mapped design. The heuristic is applied during the ite...
FPGA
2004
ACM
13 years 10 months ago
2004
ACM
In this paper we study the technology mapping problem of FPGA architectures with dual supply voltages (Vdds) for power optimization. This is done with the guarantee that the mappi...
FPGA
2006
ACM
13 years 8 months ago
2006
ACM
The paper presents several improvements to state-of-theart in FPGA technology mapping exemplified by a recent advanced technology mapper DAOmap [Chen and Cong, ICCAD `04]. Improve...
TCAD
2010
12 years 11 months ago
2010
Abstract--This paper presents a technology mapping algorithm for field-programmable gate array architectures with dual supply voltages (Vdds) for power optimization. This is done w...
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...