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» Yield Improvement, Fault-Tolerance to the Rescue
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IOLTS
2008
IEEE
83views Hardware» more  IOLTS 2008»
13 years 12 months ago
Yield Improvement, Fault-Tolerance to the Rescue?
With the technology entering the nano dimension, manufacturing processes are less and less reliable, thus drastically impacting the yield. A possible solution to alleviate this pr...
Julien Vial, Alberto Bosio, Patrick Girard, Christ...
FPL
2005
Springer
119views Hardware» more  FPL 2005»
13 years 11 months ago
Yield modelling and Yield Enhancement for FPGAs using Fault Tolerance Schemes
This paper presents a revised model for the yield analysis of FPGA interconnect layers. Based on proven yield models, this work improves the predictions and assumptions of previous...
Nicola Campregher, Peter Y. K. Cheung, George A. C...
FPL
2006
Springer
99views Hardware» more  FPL 2006»
13 years 9 months ago
Reconfiguration and Fine-Grained Redundancy for Fault Tolerance in FPGAs
As manufacturing technology enters the ultra-deep submicron era, wafer yields are destined to drop due to higher occurrence of physical defects on the die. This paper proposes a y...
Nicola Campregher, Peter Y. K. Cheung, George A. C...
ICCAD
2008
IEEE
161views Hardware» more  ICCAD 2008»
14 years 2 months ago
A low-overhead fault tolerance scheme for TSV-based 3D network on chip links
— Three-dimensional die stacking integration provides the ability to stack multiple layers of processed silicon with a large number of vertical interconnects. Through Silicon Via...
Igor Loi, Subhasish Mitra, Thomas H. Lee, Shinobu ...
ICCAD
2002
IEEE
161views Hardware» more  ICCAD 2002»
14 years 2 months ago
Non-tree routing for reliability and yield improvement
We propose to introduce redundant interconnects for manufacturing yield and reliability improvement. By introducing redundant interconnects, the potential for open faults is reduc...
Andrew B. Kahng, Bao Liu, Ion I. Mandoiu