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ICCAD
2008
IEEE
80views Hardware» more  ICCAD 2008»
14 years 1 months ago
Advancing supercomputer performance through interconnection topology synthesis
—In today’s many-core era, the interconnection networks have been the key factor that dominates the performance of a computer system. In this paper, we propose a design flow t...
Yi Zhu, Michael Taylor, Scott B. Baden, Chung-Kuan...
ICCAD
2008
IEEE
161views Hardware» more  ICCAD 2008»
14 years 1 months ago
A low-overhead fault tolerance scheme for TSV-based 3D network on chip links
— Three-dimensional die stacking integration provides the ability to stack multiple layers of processed silicon with a large number of vertical interconnects. Through Silicon Via...
Igor Loi, Subhasish Mitra, Thomas H. Lee, Shinobu ...
ICCAD
2008
IEEE
98views Hardware» more  ICCAD 2008»
14 years 1 months ago
Performance optimization of elastic systems using buffer resizing and buffer insertion
Abstract—Buffer resizing and buffer insertion are two transformation techniques for the performance optimization of elastic systems. Different approaches for each technique have ...
Dmitry Bufistov, Jorge Júlvez, Jordi Cortad...
ICCAD
2008
IEEE
108views Hardware» more  ICCAD 2008»
14 years 1 months ago
FBT: filled buffer technique to reduce code size for VLIW processors
— VLIW processors provide higher performance and better efficiency etc. than RISC processors in specific domains like multimedia applications etc. A disadvantage is the bloated...
Talal Bonny, Jörg Henkel
ICCAD
2008
IEEE
141views Hardware» more  ICCAD 2008»
14 years 1 months ago
Layout decomposition for double patterning lithography
In double patterning lithography (DPL) layout decomposition for 45nm and below process nodes, two features must be assigned opposite colors (corresponding to different exposures)...
Andrew B. Kahng, Chul-Hong Park, Xu Xu, Hailong Ya...
ICCAD
2008
IEEE
170views Hardware» more  ICCAD 2008»
14 years 1 months ago
Obstacle-avoiding rectilinear Steiner tree construction
— In today’s VLSI designs, there can be many blockages in a routing region. The obstacle-avoiding rectilinear Steiner minimum tree (OARSMT) problem has become an important prob...
Liang Li, Evangeline F. Y. Young
ICCAD
2008
IEEE
151views Hardware» more  ICCAD 2008»
14 years 1 months ago
Race analysis for SystemC using model checking
—SystemC is a system-level modeling language that offers a wide range of features to describe concurrent systems rent levels of abstraction. The SystemC standard permits simulato...
Nicolas Blanc, Daniel Kroening
ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
14 years 1 months ago
To SAT or not to SAT: Ashenhurst decomposition in a large scale
Functional decomposition is a fundamental operation in logic synthesis. Prior BDD-based approaches to functional decomposition suffer from the memory explosion problem and do not...
Hsuan-Po Lin, Jie-Hong Roland Jiang, Ruei-Rung Lee
ICCAD
2008
IEEE
138views Hardware» more  ICCAD 2008»
14 years 1 months ago
Fault tolerant placement and defect reconfiguration for nano-FPGAs
—When manufacturing nano-devices, defects are a certainty and reliability becomes a critical issue. Until now, the most pervasive methods used to address reliability, involve inj...
Amit Agarwal, Jason Cong, Brian Tagiku
ICCAD
2008
IEEE
98views Hardware» more  ICCAD 2008»
14 years 1 months ago
Statistical path selection for at-speed test
Abstract— Process variations make at-speed testing significantly more difficult. They cause subtle delay changes that are distributed rather than the localized nature of a trad...
Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chan...