Sciweavers

Share
GLVLSI
2009
IEEE
92views VLSI» more  GLVLSI 2009»
8 years 11 months ago
Online circuit reliability monitoring
In this work we propose an online reliability tracking framework that utilizes a hybrid network of on-chip temperature and delay sensors together with a circuit reliability macrom...
Bin Zhang
GLVLSI
2009
IEEE
164views VLSI» more  GLVLSI 2009»
8 years 11 months ago
Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip
In the context of nanoscale networks-on-chip (NoCs), each link implementation solution is not just a specific synthesis optimization technique with local performance and power im...
Daniele Ludovici, Georgi Nedeltchev Gaydadjiev, Da...
GLVLSI
2009
IEEE
123views VLSI» more  GLVLSI 2009»
8 years 11 months ago
Power efficient tree-based crosslinks for skew reduction
Clock distribution networks are an important design issue that is highly dependent on delay variations and load imbalances, while requiring power efficiency. Existing mesh solutio...
Inna Vaisband, Ran Ginosar, Avinoam Kolodny, Eby G...
GLVLSI
2009
IEEE
122views VLSI» more  GLVLSI 2009»
8 years 11 months ago
Enhancing SAT-based sequential depth computation by pruning search space
The sequential depth determines the completeness of bounded model checking in design verification. Recently, a SATbased method is proposed to compute the sequential depth of a de...
Yung-Chih Chen, Chun-Yao Wang
GLVLSI
2009
IEEE
103views VLSI» more  GLVLSI 2009»
8 years 11 months ago
Enhancing bug hunting using high-level symbolic simulation
The miniaturization of transistors in recent technology nodes requires tremendous back-end tuning and optimizations, making bug fixing at later design stages more expensive. Ther...
Hong-Zu Chou, I-Hui Lin, Ching-Sung Yang, Kai-Hui ...
GLVLSI
2009
IEEE
112views VLSI» more  GLVLSI 2009»
8 years 11 months ago
Simultaneous shield and repeater insertion
Resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resulting in minimum c...
Renatas Jakushokas, Eby G. Friedman
GLVLSI
2009
IEEE
159views VLSI» more  GLVLSI 2009»
8 years 11 months ago
On the complexity of graph cuboidal dual problems for 3-D floorplanning of integrated circuit design
This paper discusses the impact of migrating from 2-D to 3-D on floorplanning and placement. By looking at a basic formulation of graph cuboidal dual problem, we show that the 3-...
Renshen Wang, Chung-Kuan Cheng
CVPR
2009
IEEE
1468views Computer Vision» more  CVPR 2009»
9 years 11 months ago
Hardware-Efficient Belief Propagation
Belief propagation (BP) is an effective algorithm for solving energy minimization problems in computer vision. However, it requires enormous memory, bandwidth, and computation beca...
Chao-Chung Cheng, Chia-Kai Liang, Homer H. Chen, L...

Publication
576views
10 years 4 months ago
Within-die Process Variations: How Accurately can They Be Statistically Modeled?
Within-die process variations arise during integrated circuit (IC) fabrication in the sub-100nm regime. These variations are of paramount concern as they deviate the performance of...
Brendan Hargreaves, Henrik Hult, Sherief Reda

Lecture Notes
1962views
10 years 4 months ago
Lectures on VLSI and Integrated Circuit Design
VLSI (Very Large Scale Integration) CMOS (Complementary Metal Oxide Semiconductor) technology is the main driver of our digital revolution. The goals of these lecture are to learn ...
Sherief Reda
books