Sciweavers

DATE
2004
IEEE
147views Hardware» more  DATE 2004»
13 years 8 months ago
Automatic Tuning of Two-Level Caches to Embedded Applications
The power consumed by the memory hierarchy of a microprocessor can contribute to as much as 50% of the total microprocessor system power, and is thus a good candidate for optimiza...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt
DATE
2004
IEEE
153views Hardware» more  DATE 2004»
13 years 8 months ago
Automatic Generation of Validation Stimuli for Application-Specific Processors
O. Goloubeva, Matteo Sonza Reorda, Massimo Violant...
DATE
2004
IEEE
107views Hardware» more  DATE 2004»
13 years 8 months ago
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms
In this paper, we propose a methodology for partitioning and mapping computational intensive applications in reconfigurable hardware blocks of different granularity. A generic hyb...
Michalis D. Galanis, Athanasios Milidonis, George ...
DATE
2004
IEEE
120views Hardware» more  DATE 2004»
13 years 8 months ago
Direct Nonlinear Order Reduction with Variational Analysis
Lihong Feng, Xuan Zeng, Charles Chiang, Dian Zhou,...
DATE
2004
IEEE
89views Hardware» more  DATE 2004»
13 years 8 months ago
Improved Symoblic Simulation by Dynamic Funtional Space Partitioning
In this paper, we provide a flexible and automatic method to partition the functional space for efficient symbolic simulation. We utilize a 2-tuple list representation as the basi...
Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Chih-Chan ...
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
13 years 8 months ago
Automatic Scan Insertion and Pattern Generation for Asynchronous Circuits
This paper presents 3LSSD, a novel, easilyautomatable approach for scan insertion and ATPG of asynchronous circuits. 3LSSD inserts scan latches only into global circuit feedback p...
Aristides Efthymiou, Christos P. Sotiriou, Douglas...
DATE
2004
IEEE
138views Hardware» more  DATE 2004»
13 years 8 months ago
Microarchitecture Development via Metropolis Successive Platform Refinement
Productivity data for IC designs indicates an exponential increase in design time and cost with the number of elements that are to be included in a device. Present applications re...
Douglas Densmore, Sanjay Rekhi, Alberto L. Sangiov...
DATE
2004
IEEE
144views Hardware» more  DATE 2004»
13 years 8 months ago
A Framework for Battery-Aware Sensor Management
A distributed sensor network (DSN) designed to cover a given region R, is said to be alive if there is at least one subset of sensors that can collectively cover (sense) the regio...
Sridhar Dasika, Sarma B. K. Vrudhula, Kaviraj Chop...
DATE
2004
IEEE
119views Hardware» more  DATE 2004»
13 years 8 months ago
MINCE: Matching INstructions Using Combinational Equivalence for Extensible Processor
Designing custom-extensible instructions for Extensible Processors1 is a computationally complex task because of the large design space. The task of automatically matching candida...
Newton Cheung, Sri Parameswaran, Jörg Henkel,...