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    FPGA
    2009
    ACM
    343views FPGA» more  FPGA 2009»
    Fpga-based face detection system using Haar classifiers
    13 years 11 months ago
    Fpga-based face detection system using Haar classifiers
    Download  cseweb.ucsd.edu
    This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
    Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kas...
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    FPGA
    2009
    ACM
    196views FPGA» more  FPGA 2009»
    Towards reliable 5Gbps wave-pipelined and 3Gbps surfing interconnect in 65nm FPGAs
    13 years 11 months ago
    Towards reliable 5Gbps wave-pipelined and 3Gbps surfing interconnect in 65nm FPGAs
    Download  www.ece.ubc.ca
    Paul Teehan, Guy G. Lemieux, Mark R. Greenstreet
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    FPGA
    2009
    ACM
    188views FPGA» more  FPGA 2009»
    Clock power reduction for virtex-5 FPGAs
    13 years 11 months ago
    Clock power reduction for virtex-5 FPGAs
    Download  www.eecg.toronto.edu
    Clock network power in field-programmable gate arrays (FPGAs) is considered and two complementary approaches for clock power reduction in the Xilinx R VirtexTM -5 FPGA are presen...
    Qiang Wang, Subodh Gupta, Jason Helge Anderson
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    FPGA
    2009
    ACM
    159views FPGA» more  FPGA 2009»
    Choose-your-own-adventure routing: lightweight load-time defect avoidance
    13 years 11 months ago
    Choose-your-own-adventure routing: lightweight load-time defect avoidance
    Download  ic.ese.upenn.edu
    Aggressive scaling increases the number of devices we can integrate per square millimeter but makes it increasingly difficult to guarantee that each device fabricated has the inte...
    Raphael Rubin, André DeHon
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    FPGA
    2009
    ACM
    233views FPGA» more  FPGA 2009»
    FPCNA: a field programmable carbon nanotube array
    13 years 11 months ago
    FPCNA: a field programmable carbon nanotube array
    Download  www.icims.csl.uiuc.edu
    Carbon nanotubes (CNTs), with their unique electronic properties, are promising materials for building nanoscale circuits. In this paper, we present a new CNT-based FPGA architect...
    Chen Dong, Scott Chilstedt, Deming Chen
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    FPGA
    2009
    ACM
    209views FPGA» more  FPGA 2009»
    SPR: an architecture-adaptive CGRA mapping tool
    13 years 11 months ago
    SPR: an architecture-adaptive CGRA mapping tool
    Download  www.cs.washington.edu
    In this paper we present SPR, a new architecture-adaptive mapping tool for use with Coarse-Grained Reconfigurable Architectures (CGRAs). It combines a VLIW style scheduler and FP...
    Stephen Friedman, Allan Carroll, Brian Van Essen, ...
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    FPGA
    2009
    ACM
    328views FPGA» more  FPGA 2009»
    Diagonal tracks in FPGAs: a performance evaluation
    13 years 11 months ago
    Diagonal tracks in FPGAs: a performance evaluation
    Download  perso.telecom-paristech.fr
    Sumanta Chaudhuri
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    FPGA
    2009
    ACM
    151views FPGA» more  FPGA 2009»
    Wirelength modeling for homogeneous and heterogeneous FPGA architectural development
    13 years 11 months ago
    Wirelength modeling for homogeneous and heterogeneous FPGA architectural development
    Download  www.ece.ubc.ca
    This paper describes an analytical model that relates the architectural parameters of an FPGA to the average prerouting wirelength of an FPGA implementation. Both homogeneous and ...
    Alastair M. Smith, Steven J. E. Wilton, Joydip Das
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    FPGA
    2009
    ACM
    183views FPGA» more  FPGA 2009»
    A comparison of via-programmable gate array logic cell circuits
    13 years 11 months ago
    A comparison of via-programmable gate array logic cell circuits
    Download  www.cse.cuhk.edu.hk
    Via-programmable gate arrays (VPGAs) offer a middle ground between application specific integrated circuits and field programmable gate arrays in terms of flexibility, manufac...
    Thomas C. P. Chau, Philip Heng Wai Leong, Sam M. H...
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    FPGA
    2009
    ACM
    150views FPGA» more  FPGA 2009»
    Bus mastering PCI express in an FPGA
    13 years 11 months ago
    Bus mastering PCI express in an FPGA
    Download  research.microsoft.com
    This paper describes a bus mastering implementation of the PCI Express protocol using a Xilinx FPGA. While the theoretical peak performance of PCI Express is quite high, attaining...
    Ray Bittner
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