Sciweavers

DFT
1999
IEEE
131views VLSI» more  DFT 1999»
13 years 9 months ago
Optimal Vector Selection for Low Power BIST
In the last decade, researchers have devoted increasing efforts to reduce the average power consumption in VLSI systems during normal operation mode, while power consumption durin...
Fulvio Corno, Matteo Sonza Reorda, Maurizio Rebaud...
ISLPED
1999
ACM
91views Hardware» more  ISLPED 1999»
13 years 9 months ago
Stochastic modeling of a power-managed system: construction and optimization
-- The goal of a dynamic power management policy is to reduce the power consumption of an electronic system by putting system components into different states, each representing ce...
Qinru Qiu, Qing Wu, Massoud Pedram
ISLPED
1999
ACM
84views Hardware» more  ISLPED 1999»
13 years 9 months ago
An architectural solution for the inductive noise problem due to clock-gating
As we approach Gigascale Integration, chip power consumption is becoming a critical system parameter. Clock-gating idle units provides needed reductions in power consumption. Howe...
Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Viv...
DATE
1999
IEEE
113views Hardware» more  DATE 1999»
13 years 9 months ago
Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems
This paper proposes a methodology to evaluate the effects of encodings on the power consumption of system-level buses in the presence of multi-level cache memories. The proposed m...
William Fornaciari, Donatella Sciuto, Cristina Sil...
DAC
1999
ACM
13 years 9 months ago
Common-Case Computation: A High-Level Technique for Power and Performance Optimization
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...
Ganesh Lakshminarayana, Anand Raghunathan, Kamal S...
CODES
1999
IEEE
13 years 9 months ago
Power estimation for architectural exploration of HW/SW communication on system-level buses
The power consumption due to the HW/SW communication on system-level buses represents one of the major contributions to the overall power budget. A model to estimate the switching...
William Fornaciari, Donatella Sciuto, Cristina Sil...
DATE
2010
IEEE
145views Hardware» more  DATE 2010»
13 years 9 months ago
Energy-efficient real-time task scheduling with temperature-dependent leakage
Abstract--Leakage power consumption contributes significantly to the overall power dissipation for systems that are manufactured in advanced deep sub-micron technology. Different f...
Chuan-Yue Yang, Jian-Jia Chen, Lothar Thiele, Tei-...
MOBIHOC
2000
ACM
13 years 9 months ago
Low power rendezvous in embedded wireless networks
ln the future, wireless networking will be embedded into a wide variety of common, everyday objects [1]. In many embedded networking situations, the communicating nodes will be ver...
Terry Todd, Frazer Bennett, Alan Jones
ISLPED
2000
ACM
94views Hardware» more  ISLPED 2000»
13 years 9 months ago
Operating-system directed power reduction
This paper presents a new approach for power reduction by taking a global, software-centric view. It analyzes the sources of power consumption: tasks that require services from ha...
Yung-Hsiang Lu, Luca Benini, Giovanni De Micheli
ISLPED
2000
ACM
107views Hardware» more  ISLPED 2000»
13 years 9 months ago
Low power mixed analog-digital signal processing
The power consumption of mixed-signal systems featured by an analog front-end, a digital back-end, and with signal processing tasks that can be computed with multiplications and a...
Mattias Duppils, Christer Svensson