ISCAS
2002
IEEE
13 years 10 months ago
2002
IEEE
The evaluation of power consumption in complex digital systems is a hard task that normally requires long simulation time and complicated models. In this work, we obtain power con...
ISCAS
2002
IEEE
13 years 10 months ago
2002
IEEE
So far, oscillators have been designed to perform a specific task while the key parameters such as phase-noise and power consumption are set by the hardware design and not by the ...
DSD
2002
IEEE
13 years 10 months ago
2002
IEEE
This paper presents a design for a low-power digital matched filter (DMF) applicable to Wideband-Code Division Multiple Access (W-CDMA), which is a Direct-Sequence Spread-Spectrum...
DFT
2002
IEEE
13 years 10 months ago
2002
IEEE
A novel approach for reducing power consumption in checkers used for concurrent error detection is presented. Spatial correlations between the outputs of the circuit that drives t...
DATE
2002
IEEE
13 years 10 months ago
2002
IEEE
Optimizing power consumption at high-level is a critical step towards power-efficient digital system designs. This paper addresses the power management problem by scheduling a giv...
APCCAS
2002
IEEE
13 years 10 months ago
2002
IEEE
This paper proposes a new approach to reducing the power consumption of instruction ROMs for embedded systems. The power consumption of instruction ROMs strongly depends on the sw...
APCCAS
2002
IEEE
13 years 10 months ago
2002
IEEE
Designof portablebattery operatedmultimediadevices requires energy-ecient multiplication circuits. This paper presents a novel approach to reduce power consumption of digital mul...
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
The design and first measuring results of an ultra-low power 12bit Successive-Approximation ADC for autonomous multi-sensor systems are presented. The comparator and the DAC are o...
ICS
2003
Tsinghua U.
13 years 10 months ago
2003
Tsinghua U.
Power consumption is a critical issue in interconnection network design, driven by power-related design constraints, such as thermal and power delivery design. Usually, off-line w...
FPGA
2003
ACM
13 years 10 months ago
2003
ACM
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...