Sciweavers

VLSID
2000
IEEE
79views VLSI» more  VLSID 2000»
13 years 9 months ago
Inductive Noise Reduction at the Architectural Level
A methodology for reducing ground bounce in typical microprocessors and image processing architectures has been described. As we approach Gigascale Integration, chip power consump...
Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Viv...
IPPS
2000
IEEE
13 years 9 months ago
A Probabilistic Power Prediction Tool for the Xilinx 4000-Series FPGA
The work described here introduces a practical and accurate tool for predicting power consumption for FPGA circuits. The utility of the tool is that it enables FPGA circuit designe...
Timothy Osmulski, Jeffrey T. Muehring, Brian F. Ve...
ICC
2000
IEEE
241views Communications» more  ICC 2000»
13 years 9 months ago
Power Management for Throughput Enhancement in Wireless Ad-Hoc Networks
—In this paper we introduce the notion of power management within the context of wireless ad-hoc networks. More specifically, we investigate the effects of using different trans...
Tamer A. ElBatt, Srikanth V. Krishnamurthy, Dennis...
DCC
2000
IEEE
13 years 9 months ago
Arithmetic Coding for Low Power Embedded System Design
We present a novel algorithm that assigns codes to instructions during instruction code compression in order to minimize bus-related bit-toggling and thus reducing power consumpti...
Haris Lekatsas, Wayne Wolf, Jörg Henkel
EUROGP
2001
Springer
124views Optimization» more  EUROGP 2001»
13 years 9 months ago
An Evolutionary Approach to Automatic Generation of VHDL Code for Low-Power Digital Filters
An evolutionary algorithm is used to design a finite impulse response digital filter with reduced power consumption. The proposed design approach combines genetic optimization an...
Massimiliano Erba, Roberto Rossi, Valentino Libera...
ICS
2009
Tsinghua U.
13 years 9 months ago
Dynamic task set partitioning based on balancing memory requirements to reduce power consumption
ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on redu...
Diana Bautista, Julio Sahuquillo, Houcine Hassan, ...
HUC
2009
Springer
13 years 9 months ago
ViridiScope: design and implementation of a fine grained power monitoring system for homes
A key prerequisite for residential energy conservation is knowing when and where energy is being spent. Unfortunately, the current generation of energy reporting devices only prov...
Younghun Kim, Thomas Schmid, Zainul Charbiwala, Ma...
FPL
2009
Springer
78views Hardware» more  FPL 2009»
13 years 9 months ago
FPGA-accelerated Information Retrieval: High-efficiency document filtering
Power consumption in data centres is a growing issue as the cost of the power for computation and cooling has become dominant. An emerging challenge is the development of “envir...
Wim Vanderbauwhede, Leif Azzopardi, Mahmoud Moadel...
VLSID
2002
IEEE
114views VLSI» more  VLSID 2002»
13 years 10 months ago
Minimizing Energy Consumption for High-Performance Processing
Power consumption is becoming an increasingly important constraint in the design of microprocessors. This paper examines the use of multiple constrained processors running at lowe...
Eric F. Weglarz, Kewal K. Saluja, Mikko H. Lipasti
ISQED
2002
IEEE
106views Hardware» more  ISQED 2002»
13 years 10 months ago
Trading off Reliability and Power-Consumption in Ultra-low Power Systems
Critical systems like pace-makers, defibrillators, wearable computers and other electronic gadgets have to be designed not only for reliability but also for ultra-low power consu...
Atul Maheshwari, Wayne Burleson, Russell Tessier