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FPL
2004
Springer
98views Hardware» more  FPL 2004»
13 years 10 months ago
Power-Driven Design Partitioning
In order to enable efficient integration of FPGAs into cost effective and reliable high-performance systems as well potentially into low power mobile systems, their power efficienc...
Rajarshi Mukherjee, Seda Ogrenci Memik
ESAS
2004
Springer
13 years 10 months ago
Secure AES Hardware Module for Resource Constrained Devices
Abstract. Low power consumption, low gate count, and high throughput are standard design criteria for cryptographic coprocessors designated for resource constrained devices such as...
Elena Trichina, Tymur Korkishko
EGH
2004
Springer
13 years 10 months ago
A programmable vertex shader with fixed-point SIMD datapath for low power wireless applications
The real time 3D graphics becomes one of the attractive applications for 3G wireless terminals although their battery lifetime and memory bandwidth limit the system resources for ...
Ju-Ho Sohn, Ramchan Woo, Hoi-Jun Yoo
CARDIS
2004
Springer
149views Hardware» more  CARDIS 2004»
13 years 10 months ago
Differential Power Analysis Model and Some Results
CMOS gates consume different amounts of power whether their output has a falling or a rising edge. Therefore the overall power consumption of a CMOS circuit leaks information about...
Sylvain Guilley, Philippe Hoogvorst, Renaud Pacale...
ALGOSENSORS
2004
Springer
13 years 10 months ago
WiseMAC: An Ultra Low Power MAC Protocol for Multi-hop Wireless Sensor Networks
WiseMAC is a medium access control protocol designed for wireless sensor networks. This protocol is based on non-persistent CSMA and uses the preamble sampling technique to minimiz...
Amre El-Hoiydi, Jean-Dominique Decotignie
ASPDAC
2004
ACM
116views Hardware» more  ASPDAC 2004»
13 years 10 months ago
Temperature-aware global placement
— This paper describes a deterministic placement method for standard cells which minimizes total power consumption and leads to a smooth temperature distribution over the die. It...
Bernd Obermeier, Frank M. Johannes
ASPDAC
2004
ACM
109views Hardware» more  ASPDAC 2004»
13 years 10 months ago
Resource-constrained low-power bus encoding with crosstalk delay elimination
— In deep-submicron (DSM) technology, minimizing power consumption of a bus is one of the most important design objectives in embedded system-on-chip (SoC) design. In this paper,...
Meeyoung Cha, Chun-Gi Lyuh, Taewhan Kim
LCPC
2005
Springer
13 years 10 months ago
Compiler Control Power Saving Scheme for Multi Core Processors
With the increase of transistors integrated onto a chip, multi core processor architectures have attracted much attention to achieve high effective performance, shorten developmen...
Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroak...
ICS
2005
Tsinghua U.
13 years 10 months ago
Disk layout optimization for reducing energy consumption
Excessive power consumption is becoming a major barrier to extracting the maximum performance from high-performance parallel systems. Therefore, techniques oriented towards reduci...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
ICS
2005
Tsinghua U.
13 years 10 months ago
A performance-conserving approach for reducing peak power consumption in server systems
The combination of increasing component power consumption, a desire for denser systems, and the required performance growth in the face of technology-scaling issues are posing eno...
Wesley M. Felter, Karthick Rajamani, Tom W. Keller...