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    TCAD
    2008
    49views more  TCAD 2008»
    Register File Power Reduction Using Bypass Sensitive Compiler
    13 years 4 months ago
    Register File Power Reduction Using Bypass Sensitive Compiler
    Download  www.public.asu.edu
    This paper explores, develops, and investigates several bypass-sensitive compilation techniques to reduce the register file power by reducing the access frequency to the register f...
    Sanghyun Park, Aviral Shrivastava, Nikil D. Dutt, ...
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    TCAD
    2008
    99views more  TCAD 2008»
    MP-Trees: A Packing-Based Macro Placement Algorithm for Modern Mixed-Size Designs
    13 years 4 months ago
    MP-Trees: A Packing-Based Macro Placement Algorithm for Modern Mixed-Size Designs
    Download  cc.ee.ntu.edu.tw
    In this paper, we present a new multipacking-tree (MP-tree) representation for macro placements to handle modern mixed-size designs with large macros and high chip utilization rate...
    Tung-Chieh Chen, Ping-Hung Yuh, Yao-Wen Chang, Few...
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    TCAD
    2008
    82views more  TCAD 2008»
    A Compositional Method With Failure-Preserving Abstraction for Asynchronous Design Verification
    13 years 4 months ago
    A Compositional Method With Failure-Preserving Abstraction for Asynchronous Design Verification
    Download  www.csee.usf.edu
    ion for Asynchronous Design Verification Hao Zheng, Member, IEEE, Jared Ahrens, Tian Xia, Member, IEEE This paper presents a compositional method with preserving abstraction for sc...
    Hao Zheng, Jared Ahrens, Tian Xia
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    TCAD
    2008
    88views more  TCAD 2008»
    Self-Adaptive Data Caches for Soft-Error Reliability
    13 years 4 months ago
    Self-Adaptive Data Caches for Soft-Error Reliability
    Download  web.njit.edu
    Soft-error induced reliability problems have become a major challenge in designing new generation microprocessors. Due to the on-chip caches' dominant share in die area and tr...
    Shuai Wang, Jie S. Hu, Sotirios G. Ziavras
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    TCAD
    2008
    115views more  TCAD 2008»
    Statistical Thermal Profile Considering Process Variations: Analysis and Applications
    13 years 4 months ago
    Statistical Thermal Profile Considering Process Variations: Analysis and Applications
    Download  www.vlsi.uwaterloo.ca
    The nonuniform substrate thermal profile and process variations are two major concerns in the present-day ultradeep submicrometer designs. To correctly predict performance/ leakage...
    Javid Jaffari, Mohab Anis
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    TCAD
    2008
    49views more  TCAD 2008»
    State-Sensitive X-Filling Scheme for Scan Capture Power Reduction
    13 years 4 months ago
    State-Sensitive X-Filling Scheme for Scan Capture Power Reduction
    Download  www.cse.cuhk.edu.hk
    Jing-Ling Yang, Qiang Xu
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    TCAD
    2008
    181views more  TCAD 2008»
    A Survey of Automated Techniques for Formal Software Verification
    13 years 4 months ago
    A Survey of Automated Techniques for Formal Software Verification
    Download  www.csee.usf.edu
    The quality and the correctness of software is often the greatest concern in electronic systems. Formal verification tools can provide a guarantee that a design is free of specific...
    Vijay D'Silva, Daniel Kroening, Georg Weissenbache...
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    TCAD
    2008
    55views more  TCAD 2008»
    Model Order Reduction of Parameterized Interconnect Networks via a Two-Directional Arnoldi Process
    13 years 4 months ago
    Model Order Reduction of Parameterized Interconnect Networks via a Two-Directional Arnoldi Process
    Download  www.cs.ucdavis.edu
    Abstract--This paper presents a multiparameter momentmatching-based model order reduction technique for parameterized interconnect networks via a novel two-directional Arnoldi proc...
    Yung-Ta Li, Zhaojun Bai, Yangfeng Su, Xuan Zeng
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    TCAD
    2008
    106views more  TCAD 2008»
    Track Routing and Optimization for Yield
    13 years 4 months ago
    Track Routing and Optimization for Yield
    Download  www.cerc.utexas.edu
    Abstract--In this paper, we propose track routing and optimization for yield (TROY), the first track router for the optimization of yield loss due to random defects. As the probabi...
    Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan
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    TCAD
    2008
    59views more  TCAD 2008»
    Dual-Vdd Buffer Insertion for Power Reduction
    13 years 4 months ago
    Dual-Vdd Buffer Insertion for Power Reduction
    Download  www.ee.ucla.edu
    King Ho Tam, Yu Hu, Lei He, Tom Tong Jing, Xinyi Z...
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