VTS
2007
IEEE
13 years 10 months ago
2007
IEEE
When a test set size is larger than desired, some patterns must be dropped. This paper presents a systematic method to reduce test set size; the method reorders a test set using t...
MEMOCODE
2007
IEEE
13 years 11 months ago
2007
IEEE
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
ATS
2009
IEEE
13 years 11 months ago
2009
IEEE
In this paper, we present test generation procedures to improve scan chain failure diagnosis. The proposed test generation procedures improve diagnostic resolution by using multi-...
ICCD
2004
IEEE
14 years 1 months ago
2004
IEEE
This paper introduces a new method for deterministic diagnosis of logic cores. The proposed method is based on onchip decompression and comparison of incompletely specified test ...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
| This paper reports the design of a Test Pattern Generator (TPG) for VLSI circuits. The onchip TPG is so designed that it generates test patterns while avoiding generation of a gi...
VLSID
2003
IEEE
14 years 5 months ago
2003
IEEE
This paper introduces a Built-In Self Test (BIST) structure referred to as Universal BIST (UBIST). The Test Pattern Generator (TPG) of the proposed UBIST is designed to generate an...