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MTV
2005
IEEE
138views Hardware» more  MTV 2005»
13 years 10 months ago
Diagnosing Faulty Functional Units in Processors by Using Automatically Generated Test Sets
Microprocessor technology is increasingly used for many applications; the large market volumes call for cost containment in the production phase. Process yield for processor produ...
Paolo Bernardi, Ernesto Sánchez, Massimilia...
DATE
2005
IEEE
99views Hardware» more  DATE 2005»
13 years 10 months ago
Worst-Case and Average-Case Analysis of n-Detection Test Sets
Test sets that detect each target fault n times (n-detection test sets) are typically generated for restricted values of n due to the increase in test set size with n. We perform ...
Irith Pomeranz, Sudhakar M. Reddy
CEC
2005
IEEE
13 years 10 months ago
Dynamic power minimization during combinational circuit testing as a traveling salesman problem
Testing of VLSI circuits can cause generation of excessive heat which can damage the chips under test. In the random testing environment, high-performance CMOS circuits consume sig...
Artem Sokolov, Alodeep Sanyal, L. Darrell Whitley,...
ASPDAC
2006
ACM
119views Hardware» more  ASPDAC 2006»
13 years 11 months ago
A dynamic test compaction procedure for high-quality path delay testing
- We propose a dynamic test compaction procedure to generate high-quality test patterns for path delay faults. While the proposed procedure generates a compact two-pattern test set...
Masayasu Fukunaga, Seiji Kajihara, Xiaoqing Wen, T...
DATE
2006
IEEE
82views Hardware» more  DATE 2006»
13 years 11 months ago
Concurrent core test for SOC using shared test set and scan chain disable
A concurrent core test approach is proposed to reduce the test cost of SOC. Multiple cores in SOC can be tested simultaneously by using a shared test set and scan chain disable. P...
Gang Zeng, Hideo Ito
DATE
2006
IEEE
95views Hardware» more  DATE 2006»
13 years 11 months ago
An effective technique for minimizing the cost of processor software-based diagnosis in SoCs
The ever increasing usage of microprocessor devices is sustained by a high volume production that in turn requires a high production yield, backed by a controlled process. Fault d...
Paolo Bernardi, Ernesto Sánchez, Massimilia...
ISAAC
2007
Springer
131views Algorithms» more  ISAAC 2007»
13 years 11 months ago
On the Fault Testing for Reversible Circuits
This paper shows that it is NP-hard to generate a minimum complete test set for stuck-at faults on the wires of a reversible circuit. We also show non-trivial lower bounds for the ...
Satoshi Tayu, Shigeru Ito, Shuichi Ueno
VTS
2007
IEEE
89views Hardware» more  VTS 2007»
13 years 11 months ago
Test Set Reordering Using the Gate Exhaustive Test Metric
When a test set size is larger than desired, some patterns must be dropped. This paper presents a systematic method to reduce test set size; the method reorders a test set using t...
Kyoung Youn Cho, Edward J. McCluskey
WACV
2008
IEEE
13 years 11 months ago
Multi-Pose Face Detection with Asymmetric Haar Features
In this paper we present a system for multi-pose face detection. Our system presents three main contributions. First, we introduce the use of asymmetric Haar features. Asymmetric ...
Geovany A. Ramírez, Olac Fuentes
ICASSP
2008
IEEE
13 years 11 months ago
Speaker diarization of French broadcast news
We report results on speaker diarization of French broadcast news and talk shows on current affairs. This speaker diarization process is a multistage segmentation and clustering s...
Vishwa Gupta, Gilles Boulianne, Patrick Kenny, Pie...