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    VLSID
    1999
    IEEE
    88views VLSI» more  VLSID 1999»
    New and Exact Filling Algorithms for Layout Density Control
    13 years 9 months ago
    New and Exact Filling Algorithms for Layout Density Control
    Download  www.cs.virginia.edu
    To reduce manufacturing variation due to chemicalmechanical polishing and to improve yield, layout must be made uniform with respect to density criteria. This is achieved by layou...
    Andrew B. Kahng, Gabriel Robins, Anish Singh, Alex...
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    VLSID
    1999
    IEEE
    104views VLSI» more  VLSID 1999»
    Interconnect Optimization Strategies for High-Performance VLSI Designs
    13 years 9 months ago
    Interconnect Optimization Strategies for High-Performance VLSI Designs
    Download  vlsicad.ucsd.edu
    Interconnect tuning and repeater insertion are necessary to optimize interconnectdelay, signalperformanceandintegrity, andinterconnectmanufacturability and reliability. Repeater i...
    Andrew B. Kahng, Sudhakar Muddu, Egino Sarto
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    VLSID
    1999
    IEEE
    100views VLSI» more  VLSID 1999»
    Improved Effective Capacitance Computations for Use in Logic and Layout Optimization
    13 years 9 months ago
    Improved Effective Capacitance Computations for Use in Logic and Layout Optimization
    Download  vlsicad.ucsd.edu
    We describe an improved iterationless approach for computing the effective capacitance of an interconnect load at a driving gate output. The speed and accuracy of our approach mak...
    Andrew B. Kahng, Sudhakar Muddu
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    VLSID
    1999
    IEEE
    64views VLSI» more  VLSID 1999»
    Exact Output Response Computation of RC Interconnects under Polynomial Input Waveforms
    13 years 9 months ago
    Exact Output Response Computation of RC Interconnects under Polynomial Input Waveforms
    Download  eprints.iisc.ernet.in
    Accurate output response computation of RC interconnects under various input excitations is a key issue in deep submicron delay analysis.In this paper,we present an exact analysis...
    Satrajit Gupta, Lalit M. Patnaik
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    VLSID
    1999
    IEEE
    97views VLSI» more  VLSID 1999»
    A New Methodology for Concurrent Technology Development and Cell Library Optimization
    13 years 9 months ago
    A New Methodology for Concurrent Technology Development and Cell Library Optimization
    Download  www.pdf.com
    To minimize the time to market and cost of new sub 0.25um process technologies and products, PDF Solutions, Inc., has developed a new comprehensive approach based on the use of pr...
    Marko P. Chew, Sharad Saxena, Thomas F. Cobourn, P...
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    VLSID
    1999
    IEEE
    86views VLSI» more  VLSID 1999»
    Multi-Valued Logic Synthesis
    13 years 9 months ago
    Multi-Valued Logic Synthesis
    Download  www.cs.uleth.ca
    We survey some of the methods used for manipulating, representing, and optimizing multi-valued logic with the view of both building a better understanding of the more specialized ...
    Robert K. Brayton, Sunil P. Khatri
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    VLSID
    1999
    IEEE
    102views VLSI» more  VLSID 1999»
    A Low-Power Wireless Camera System
    13 years 9 months ago
    A Low-Power Wireless Camera System
    Download  mtlweb.mit.edu
    This paper describes the system design of a lowpower wireless camera. A system level approach is used to reduce energy dissipation and maximize battery lifetime. System properties...
    Anantha Chandrakasan, Abram P. Dancy, James Goodma...
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    VLSID
    1999
    IEEE
    99views VLSI» more  VLSID 1999»
    Array Index Allocation under Register Constraints in DSP Programs
    13 years 9 months ago
    Array Index Allocation under Register Constraints in DSP Programs
    Download  ls12-www.cs.tu-dortmund.de
    Abstract Code optimization for digital signal processors DSPs has been identi ed as an important new topic in system-level design of embedded systems. Both DSP processors and algor...
    Anupam Basu, Rainer Leupers, Peter Marwedel
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    VLSID
    1999
    IEEE
    87views VLSI» more  VLSID 1999»
    Digital Circuit Design for Minimum Transient Energy and a Linear Programming Method
    13 years 9 months ago
    Digital Circuit Design for Minimum Transient Energy and a Linear Programming Method
    Download  www.eng.auburn.edu
    This paper provides a theoretical basis for eliminating or reducing the energy consumption due to transients in a synchronous digital circuit. The transient energy is minimized wh...
    Vishwani D. Agrawal, Michael L. Bushnell, Ganapath...
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