A three-dimensional (3D) CMOS imager constructed from stacking a pixel array of image sensors, an analog-to-digital converter (ADC) array, and an image signal processor (ISP) arra...
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
The Kahn Process Network (KPN) model is a widely used modelof-computation to specify and map streaming applications onto multiprocessor systems-on-chips. In general, KPNs are difï...
Using device write buffers is a promising technique to improve the write performance of solid-state disks. The write buffer not only reduces the write traffic to the flash but als...
Memory consistency litmus tests are small parallel programs that are designed to illustrate subtle differences between memory consistency models by exhibiting different outcomes...